School of computer science

Georgia Institute of Technology

CS4290/CS6290HPCA Fall 2010


Homework assignment #2
Due: Thursday, September 30, Before class (no late submission)
Hyesoon Kim, Instructor

This is an individual assignment. You can discuss this assignment with other classmates but you should do your assignment individually.

  1. (10 points) A computer has a 256KB write back cache. Each cache block is 64 bits, the cache is 8-way set associative and uses the true LRU replacement policy. Assume a 24-bit address space and byte-addressable memory. How big (in bits) is the tag store ?


  2. (10 points) Discuss mechanisms to hide memory latency other than a cache.

  3. (10 points) What are purposes of write buffers in a processor?

  4. (10 points) Even an in-order scheduling processor might have an out of order complete case if there is no ROB. When would it happen?
    How can it solve this problem without using a rob?

  5. (10 points) When a processor discovers a branch misprediction in an out of order processor, what are the steps for flushing the pipeline and resuming from the correct path?

  6. (10 points) Machine A is 1GHz and IPC is 1.4. Machine B is 1.5GHz and IPC is 1.2. A program has 90B instructions. Between machine A and machine B, which one is faster? How long does it take to finish the program on both machines respectively?